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Data Sheet
Bit
ADE7854/ADE7858/ADE7868/ADE7878
Location
4:3
Bit Mnemonic
HXFER[1:0]
Default Value
00
Description
00 = for ADE7854 , HSDC transmits sixteen 32-bit words in the following order: IAWV, VAWV,
IBWV, VBWV, ICWV, and VCWV, one 32-bit word equal to 0, AVA, BVA, CVA, AWATT, BWATT,
and CWATT, three 32-bit words equal to 0. For ADE7858,HSDCtransmitssixteen32-bit
words in the following order: IAWV, VAWV, IBWV, VBWV, ICWV, and VCWV, one 32-bit word
equal to 0, AVA, BVA, CVA, AWATT, BWATT, CWATT, AVAR, BVAR, and CVAR. For the ADE7868
and ADE7878 , HSDC transmits sixteen 32-bit words in the following order: IAWV, VAWV, IBWV,
VBWV, ICWV, VCWV, INWV, AVA, BVA, CVA, AWATT, BWATT, CWATT, AVAR, BVAR, and CVAR.
01 = for the ADE7854 and ADE7858 , HSDC transmits six instantaneous values of currents
and voltages: IAWV, VAWV, IBWV, VBWV, ICWV, and VCWV, and one 32-bit word equal to 0.
For the ADE7868 and ADE7878 , HSDC transmits seven instantaneous values of currents and
voltages: IAWV, VAWV, IBWV, VBWV, ICWV, VCWV, and INWV.
10 = for the ADE7854 , HSDC transmits six instantaneous values of phase powers: AVA, BVA,
CVA, AWATT, BWATT, and CWATT and three 32-bit words equal to 0. For the ADE7858 ,
ADE7868 , and ADE7878 , HSDC transmits nine instantaneous values of phase powers: AVA,
BVA, CVA, AWATT, BWATT, CWATT, AVAR, BVAR, and CVAR.
11 = reserved. If set, the ADE7854 / ADE7858 / ADE7868 / ADE7878 behave as if HXFER[1:0] = 00.
5
HSAPOL
0
0: SS/HSA output pin is active low.
1: SS/HSA output pin is active high.
7:6
Reserved
00
Reserved. These bits do not manage any functionality.
Table 54. LPOILVL Register (Address 0xEC00) 1
Bit Location
2:0
7:3
Bit Mnemonic
LPOIL[2:0]
LPLINE[4:0]
Default Value
111
00000
Description
Threshold is put at a value corresponding to full scale multiplied by LPOIL/8.
The measurement period is (LPLINE + 1)/50 seconds.
1
The LPOILVL register is available only for the ADE7868 and ADE7878 ; it is reserved for ADE7854 and ADE7858 .
Table 55. CONFIG2 Register (Address 0xEC01)
Bit
Location
0
Bit Mnemonic
EXTREFEN
Default Value
0
Description
When this bit is 0, it signifies that the internal voltage reference is used in the ADCs.
When this bit is 1, an external reference is connected to the Pin 17 REF IN/OUT .
1
I2C_LOCK
0
When this bit is 0, the SS/HSA pin can be toggled three times to activate the SPI port. If I 2 C is
the active serial port, this bit must be set to 1 to lock it in. From this moment on, spurious
toggling of the SS/HSA pin and an eventual switch into using the SPI port is no longer possible. If
SPI is the active serial port, any write to CONFIG2 register locks the port. From this moment
on, a switch into using I 2 C port is no longer possible. Once locked, the serial port choice is
maintained when the ADE7854 / ADE7858 / ADE7868 / ADE7878 change PSMx power modes.
7:2
Reserved
0
Reserved. These bits do not manage any functionality.
Rev. H| Page 97 of 100
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